All parts / LIS3DH

LIS3DH register map

3-axis MEMS accelerometer with FIFO, click and 4D detection — STMicroelectronics

Get it as a C header

pip install regforge
regforge gen LIS3DH --out ./src --driver --tests

Writes lis3dh_regs.h with every address, mask and shift below, a bus-agnostic driver skeleton, and a file of compile-time assertions that make your compiler check the bit arithmetic. No API key needed — this part ships inside the package.

Registers

Bit layouts

Drawn MSB-first, the way the datasheet draws them. [7:5] means shift 5, width 3, mask 0xE0 — this is the notation that costs people a day when they read it backwards.

Generated C header

What regforge gen LIS3DH writes for STATUS_REG:

/* ------------------------------------------------------------------------ */
/* STATUS_REG @ 0x27u  ro  8-bit  reset 0x00u */
/* Acceleration data status */
/* ------------------------------------------------------------------------ */

#define LIS3DH_STATUS_REG                              0x27u
#define LIS3DH_STATUS_REG_WIDTH                        8u
#define LIS3DH_STATUS_REG_RESET                        0x00u

/*   ZYXOR bits [7] ro reset 0x00u -- X, Y and Z data overrun */
#define LIS3DH_STATUS_REG_ZYXOR_SHIFT                  7u
#define LIS3DH_STATUS_REG_ZYXOR_WIDTH                  1u
#define LIS3DH_STATUS_REG_ZYXOR_MASK                   0x80u
#define LIS3DH_STATUS_REG_ZYXOR_GET(reg)               (((uint8_t)(reg) & 0x80u) >> 7u)
#define LIS3DH_STATUS_REG_ZYXOR_SET(reg, val)          (((uint8_t)(reg) & (uint8_t)~0x80u) | (((uint8_t)(val) << 7u) & 0x80u))

/*   ZOR bits [6] ro reset 0x00u -- Z data overrun */
#define LIS3DH_STATUS_REG_ZOR_SHIFT                    6u
#define LIS3DH_STATUS_REG_ZOR_WIDTH                    1u
#define LIS3DH_STATUS_REG_ZOR_MASK                     0x40u
#define LIS3DH_STATUS_REG_ZOR_GET(reg)                 (((uint8_t)(reg) & 0x40u) >> 6u)
#define LIS3DH_STATUS_REG_ZOR_SET(reg, val)            (((uint8_t)(reg) & (uint8_t)~0x40u) | (((uint8_t)(val) << 6u) & 0x40u))

/*   YOR bits [5] ro reset 0x00u -- Y data overrun */
#define LIS3DH_STATUS_REG_YOR_SHIFT                    5u
#define LIS3DH_STATUS_REG_YOR_WIDTH                    1u
#define LIS3DH_STATUS_REG_YOR_MASK                     0x20u
#define LIS3DH_STATUS_REG_YOR_GET(reg)                 (((uint8_t)(reg) & 0x20u) >> 5u)
#define LIS3DH_STATUS_REG_YOR_SET(reg, val)            (((uint8_t)(reg) & (uint8_t)~0x20u) | (((uint8_t)(val) << 5u) & 0x20u))

/*   XOR_ bits [4] ro reset 0x00u -- X data overrun */
#define LIS3DH_STATUS_REG_XOR_SHIFT                    4u
#define LIS3DH_STATUS_REG_XOR_WIDTH                    1u
#define LIS3DH_STATUS_REG_XOR_MASK                     0x10u
#define LIS3DH_STATUS_REG_XOR_GET(reg)                 (((uint8_t)(reg) & 0x10u) >> 4u)
#define LIS3DH_STATUS_REG_XOR_SET(reg, val)            (((uint8_t)(reg) & (uint8_t)~0x10u) | (((uint8_t)(val) << 4u) & 0x10u))

/*   ZYXDA bits [3] ro reset 0x00u -- X, Y and Z new data available */
#define LIS3DH_STATUS_REG_ZYXDA_SHIFT                  3u
#define LIS3DH_STATUS_REG_ZYXDA_WIDTH                  1u
#define LIS3DH_STATUS_REG_ZYXDA_MASK                   0x08u
#define LIS3DH_STATUS_REG_ZYXDA_GET(reg)               (((uint8_t)(reg) & 0x08u) >> 3u)
#define LIS3DH_STATUS_REG_ZYXDA_SET(reg, val)          (((uint8_t)(reg) & (uint8_t)~0x08u) | (((uint8_t)(val) << 3u) & 0x08u))

Compared with

• LIS3DH vs ADXL345

Related parts

Source

Transcribed from ST LIS3DH datasheet (hand-transcribed) (hand-transcribed). Hand-authored seed entry, not machine-extracted. Multi-byte reads require the MSB of the sub-address to be set for auto-increment; that is a bus-protocol detail rather than a register and is not modelled here. Check against the datasheet before trusting it, then mark it verified.

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